cystech electronics corp. spec. no. : c782n3 issued date : 2011.05.04 revised date : page no. : 1/7 MTF44P03N3 cystek product specification 30v p-channel logic level enhancement mode mosfet MTF44P03N3 bv dss -30v r dson(max) 44m i d -4a features ? lower gate charge ? pb-free lead plating and halogen-free package equivalent circuit outline absolute maximum ratings (tc=25 c, unless otherwise noted) parameter symbol limits unit drain-source voltage v ds -30 v gate-source voltage v gs 12 v t a =25 c -4 continuous drain current t a =70 c i d -3 a pulsed drain current i dm -16 (note 1 & 2) a t a =25 c 1.5 (note 3) power dissipation t a =70 c p d 1 (note 3) w thermal resistance, junction to ambient r th, j-a 100 (note 3) c/w operating junction and storage te mperature tj, tstg -55 ~ +175 c note : 1. pulse width limited by maximum junction temperature 2. duty cycle 1% 3. surface mounted on 1 in2 copper pad of fr4 board; 270 c/w when mounted on min. copper pad MTF44P03N3 sot-23 s g gate s source d drain d g
cystech electronics corp. spec. no. : c782n3 issued date : 2011.05.04 revised date : page no. : 2/7 MTF44P03N3 cystek product specification electrical characteristics (t a =25 c, unless otherwise specified) symbol min. typ. max. unit test conditions static bv dss -30 - - v v gs =0, i d =-250 a v gs(th) -0.3 -0.75 -1.2 v v ds =v gs , i d =-250 a i gss - - 100 na v gs =12v, v ds =0 - - -1 a v ds =-24v, v gs =0 i dss - - -10 a v ds =-20v, v gs =0, tj=125 c i don 1 -4 - - a v ds =-5v, v gs =-4.5v - 32 38 i d =-4.5a, v gs =-10v - 39 44 i d =-4a, v gs =-4.5v *r ds(on) 1 - 60 75 m i d =-3a, v gs =-2.5v *g fs 1 - 13 - s v ds =-5v, i d =-4a dynamic ciss - 1079 - coss - 116 - crss - 93 - pf v ds =-15v, v gs =0, f=1mhz *t d(on) 1 2 - 6 - *t r 1 2 - 7 - *t d(off) 1 2 - 45 - *t f 1 2 - 15 - ns v ds =-15v, i d =-1a,v gs =-4.5v, r g =6 *qg 1 2 - 10 - *qgs 1 2 - 1.5 - *qgd 1 2 - 3.5 - nc v ds =-15v, i d =-4a, v gs =-4.5v source-drain diode i s - - -2 i sm 3 - - -8 a v sd 1 - - -1.2 v i f =i s , v gs =0v 1 pulse test : pulse width 300 s, duty cycle 2% 2 independent of operating temperature 3 pulse width limited by maximum junction temperature ordering information device package shipping marking MTF44P03N3 sot-23 (pb-free) 3000 pcs / tape & reel 26
cystech electronics corp. spec. no. : c782n3 issued date : 2011.05.04 revised date : page no. : 3/7 MTF44P03N3 cystek product specification characteristic curves
cystech electronics corp. spec. no. : c782n3 issued date : 2011.05.04 revised date : page no. : 4/7 MTF44P03N3 cystek product specification characteristic curves(cont.)
cystech electronics corp. spec. no. : c782n3 issued date : 2011.05.04 revised date : page no. : 5/7 MTF44P03N3 cystek product specification reel dimension carrier tape dimension
cystech electronics corp. spec. no. : c782n3 issued date : 2011.05.04 revised date : page no. : 6/7 MTF44P03N3 cystek product specification recommended wave soldering condition product peak temperature soldering time pb-free devices 260 +0/-5 c 5 +1/-1 seconds recommended temperature profile for ir reflow profile feature sn-pb eutectic assembly pb-free assembly average ramp-up rate (tsmax to tp) 3 c/second max. 3 c/second max. preheat ? temperature min(t s min) ? temperature max(t s max) ? time(ts min to ts max ) 100 c 150 c 60-120 seconds 150 c 200 c 60-180 seconds time maintained above: ? temperature (t l ) ? time (t l ) 183 c 60-150 seconds 217 c 60-150 seconds peak temperature(t p ) 240 +0/-5 c 260 +0/-5 c time within 5 c of actual peak temperature(tp) 10-30 seconds 20-40 seconds ramp down rate 6 c/second max. 6 c/second max. time 25 c to peak temperature 6 minutes max. 8 minutes max. note : all temperatures refer to topside of t he package, measured on the package body surface.
cystech electronics corp. spec. no. : c782n3 issued date : 2011.05.04 revised date : page no. : 7/7 MTF44P03N3 cystek product specification sot-23 dimension marking: style: pin 1.gate 2.source 3.drain 3-lead sot-23 plastic surface mounted package cystek package code: n3 device code date code *: typical dim inches millimeters inches millimeters min. max. min. max. dim min. max. min. max. a 0.0335 0.0492 0.85 1.25 e1 0.0532 0.0709 1.35 1.80 a1 0.0000 0.0051 0.00 0.13 e 0.0374* 0.95* a2 0.0315* 0.80* e1 0.0748* 1.90* b 0.0118 0.0197 0.30 0.50 f 0.0335 0.0543 0.85 1.38 c 0.0032 0.0079 0.08 0.20 g 0.0079 0.0236 0.20 0.60 d 0.1083 0.1220 2.75 3.10 l1 0.0138 0.0295 0.35 0.75 e 0.0906 0.1063 2.30 2.70 notes: 1.controlling dimension: millimeters. 2.maximum lead thickness includes lead finish thickness, and minimum lead thickness is the minimum thickness of base material. 3.if there is any question with packing specification or packing method, please c ontact your local cystek sales office. material: ? lead: pure tin plated. ? mold compound: epoxy resin family, flammability solid burning class: ul94v-0. important notice: ? all rights are reserved. reproduction in whole or in part is prohibited without the prior written approval of cystek. ? cystek reserves the right to make changes to its products without notice. ? cystek semiconductor products are not warranted to be suitable for use in life-support applications, or systems. ? cystek assumes no liability for any consequence of customer pr oduct design, infringement of pat ents, or application assistance .
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